28_Component Peripherals
The data sheets for most of the components we have chosen (ADC, regulators, H-bridges) provide detailed application-specific design specifications for component peripherals and configuration.
The following notes show some of the recommended basic setups for our primary components and talk about some of the peripheral values.
Voltage Regulators
Figure 1 shows a Multisim layout of the two primary voltage regulators. The switching regulator for the motor power @7V is not shown, but it would resemble the switching regulator circuit shown.
On the switching regulator circuit, there is a raw power input of 11.1V from the batteries. This input power is stabilized with the input capacitor C1 to help reduce noise. The input power line is also connected to PGOOD on the switching regulator as a pull-up source. The PGOOD pin indicates if power is being supplied to the output or not. The BST pin is a MOSFET gate that supplies the output power to SW. The FB pin is a feedback pin monitoring output voltage. The chip’s internal short circuit-protection uses FB to determine if a short may be happening and reduces the switching frequency to limit current. The schottky diode (D1) is was recommended to be used for conducting the inductor current during the off-time of the power signal. With the MOSFET gate closed, the inductor reduce ripple in the supply voltage as it continues to drive current to the source.
The linear regulator’s peripherals basically consist of input and output capacitors to stabilize voltage levels. The capacitor connected to SS determines the soft-startup time for the regulator. The recommended 1nF value of the SS capacitor is will increase the 380us startup time to about 2ms, giving the power systems capacitors and inductors more time to stabilize as the power is initiated.
Motor Drivers:
The motor drivers used are essentially no different than the dual H-bridge chips we used in Microprocessors, except they are on a much smaller surface mount package. There are a total of 4 half H-bridges allowing for bipolar control of two motors per package. The Ain and Bin pins receive control signals from the micro controller to determine the motor’s power supply frequency, polarity, and rms voltage level. If AND and NOT gates are used along with this chip, a total of two signals can be used to control each motor’s speed and direction (a PWM for speed, and an on/off for direction). If the PWM signal is sent to Ain1 and a 0 sent to Ain2, then motor A will spin one direction. If the signals are interchanged using AND and NOT gates, the motor will spin the opposite direction. The MODE pin is used to select whether DC brushed or stepper motors are being used. A GND attached indicates DC Brushless and results in the output characteristics just described.
ADC:
The AVDD and AVSS pins on the ADC are the reference pins for the Analog converter. DVDD and DGND are the logic references for the chip. Ain0 through Ain3 are where 4 single-ended Analog signals can be input, and they will be converted to a 16-bit value using the analog references to determine the digital value. The analog and digital reference pins both have input capacitors to minimize noise and keep conversions as accurate as possible; however, linear regulators will be used to supply power to the ADC minimizing any noise from the power supply.
The ADC communicates the 16-bit values through a SPI interface. The CLK pin is the external clock source and can be connected to ground if we want to use the ADC’s internal clock. The CS pin is used only if multiple SPI devices are being communicated to. If we end up only using this one ADC on our SPI interface, then CS can be tied to GND. SCLK is the clocking signal for SPI communication and will be generated by the micro controller. Din is used to accept programming and command data from the micro controller while Dout/DRDY will be used to indicate when data is ready and will send the converted values over to the micro-controller.